1. Field of the Invention
The present invention relates to a field of semiconductor devices, and, more specifically, to programming NAND flash cells.
2. Discussion of Related Art
A flash device is a type of memory device in which cells may be erased and reprogrammed in blocks instead of one byte at a time. Each cell of the flash device uses one transistor to achieve high density, high reliability, and low power consumption.
The field effect transistor (FET) in the cell includes a floating gate between a P-substrate and a control gate. A word line is connected to the control gate of the transistor. A bit line is connected to the N+ source/drain diffusions straddling a channel below the floating gate in the P-substrate.
The floating gate can be programmed to hold a charge or erased to remove the charge. Both the program and the erase operations are accomplished through a Fowler-Nordheim tunneling mechanism.
The flash device using a single-level cell is in an erased (“1”) state with a low threshold (“turn on”) voltage when there is no excess of electrons in the insulating dielectric surrounding (below and above) the floating gate. The flash device using the single-level cell is in a programmed (“0”) state when an excess number of electrons in the insulating dielectric increases the threshold voltage.
The most widespread flash memory array architectures include NOR and NAND. A NOR flash device is used for fast (direct random access) read, such as in code storage, for execute-in-place (XiP) functionality, such as in embedded applications, and for byte-write capabilities. A NAND flash device is used for fast write (program), fast erase, and fast (serial access) read operations in high-capacity file (disk) or large sequential-data storage applications, such as for consumer multimedia (audio or video) applications, as well as, PC data.
The NAND flash cell size (4F2) is about half the size of the NOR flash cell size (10F2) because NOR flash cells require a separate metal contact for each cell. The NOR flash cell also requires a larger transistor because it has to “pull down” an entire bit line with a larger amount of current.
The NAND flash device can perform 3 basic operations: read a page, program (write) a page (completely or partially), and erase a block. The block includes a fixed number of sequential pages.
It may be desirable to improve a programming speed of the NAND flash device using a multi-level cell. The present invention discloses a method to select a more efficient initial value for a start voltage for the gate when programming the MLC NAND flash device.